A secure Power-on Reset engine is provided, inside a processor chip, which guarantees a secure initialization of the chip to enable secure code execution. Such liquid-phase oxidation is carried out in a bubble column reactor that provides for a highly efficient reaction at relatively low temperatures. The delay line can also be formed in a multilayer structure rather than on the above dielectric substrate. The collage engine may then present the informative viewpoints to the end-user for inclusion in a collage of 2D renderings based upon the informative viewpoints.