A method and apparatus is provided to generate a pulse-width modulated with enhanced features in accordance with a pre-determined protocol using a standard microprocessor. The memory controller further outputs write data bits and a second timing signal to the DRAM in association with the address bits, each of the write data bits being associated with an edge of the second timing signal and the second timing signal requiring a second propagation delay time to propagate to the DRAM. Confidence indicator values may be updated according to previous manual selections or rejections of the associated class or object, for example. Crop damage is avoided or at least minimized by avoiding overdriving the existing crops. When light is not present at the first port, the optical circuit switch may wait until light is present at the first port before making the connection.