A transistor and method of manufacturing thereof having stressed material layers formed in the channel to increase the speed and improve performance of the transistor. A single enhanced core can be defined that enables operation of subset of parent physical layer devices. The bottom portion of the elongate body is integral with the central portion and defines an outwardly projecting convexly shaped configuration. External terminals may be connected to the memory block through the switch circuit when there is no defect and may be disconnected from the memory block when there is a defect. Such methods are further useful for accelerating wound healing. As such, the cap layer and the spacer separate the self-aligned contact structure from directly contacting the metal gate conductor.