1459987799-6754b618-7101-4de1-80d8-ab88233aa54c

In a hardware accelerator for preamble detection of a Physical Random Access Channel in a CDMA based communication system, buffering means stores input samples received at an antenna at a first rate, addressing means read a predetermined consecutive number of the input samples in parallel at a second different rate. A plurality of event handlers are loaded into a hidden memory space that is accessible to a hidden execution mode supported by each of a plurality of processors in a multiprocessor computer system but is not accessible to other operating modes of those processors. At least one of the first and second electrodes is a bimetallic electrode which includes a conducting layer and a metallic layer.