A system and a method for testing fast synchronous digital circuit with an additional built outside self test semiconductor chip disposed between a test device and circuit under test. The method may include contacting the mixture with a solvent such as an alcohol, then contacting the resulting alcohol composition with a SERS surface. Commonly positioned via holes within the component modules provide for communication among the dies on the stacked modules. The level of processing is adapted with the availability of the processing power at the chosen processing node in the network in one embodiment.