The memory cell array has memory cells each positioned at respective intersections between a plurality of first wirings and a plurality of second wirings. Provided in the housing is a chamber that is divided by a diaphragm into a pump chamber and a drive chamber that is acted upon by impulse pressure fluctuations during operation of the internal combustion engine. The core portion is wholly or partly composed of a material different from the material of the outer layer, and at least one of the core portion and the outer layer is composed of the first material or the second material. By including a cache memory inside the loadstore unit, the processor is directly interfaced from its loadstore units to the caches.