A customizable cache discard policy is provided which reduces adverse consequences of conventional discard policies. In this apparatus, at least one coder block has a parity check matrix. A plurality of differential pair terminals are dielectrically supported within the waveguides and having contacting ends extending beyond the mounting and contacting surfaces so as to electrically couple the motherboard and the daughterboard. Host write operations are quiesced at the first storage system in response to a first command from a first manager. The information processing device includes a substrate with a CPU mounted thereon, a housing that accommodates the substrate, an extension board arranged to be parallel to the substrate, and a supporting member that is fixed on the housing and is arranged to be parallel to at least one end surface of the substrate so that the supporting member supports the extension board.