A large area dummy pattern DL is formed in a layer underneath a target T2 region formed in a scribe region SR of a wafer. A plurality of protruding member are formed on the surface of the second wiring board. Distance between opposed surfaces of the third dielectric and the fourth dielectric is the predetermined distance. Fuzzy logic control rules can be used to calculate adjusted target levels not actually stored in the reduced boost table. The floor can be separated at least partially from the base in a removably attachable fashion to provide selective access to a hollow inside.