A clock and data recovery circuit employing zero-crossing linearizing technique. Alternatively, the bit line junction can have a thin area of effective programming and erasing located nearby. Hence, even in the event of a localized abnormal state judgment by one anomaly judgment device or failure, a final judgment is not made based on that anomaly alone, and at least one other anomaly judgment is made, whereby erroneous judgments can be eliminated and a highly accurate anomaly judgment is possible. As the v-block and stem are raised, a cartridge case is then positioned between the v-block and the pedestal of this apparatus. The laminated body includes a first magnetic layer having a coercivity lower than the magnetic field applied by the main magnetic pole and a second magnetic layer having a coercivity lower than the magnetic field applied by the main magnetic pole.