An apparatus for generating a reference clock for a DLL circuit includes a buffering unit configured to buffer an external clock so as to generate a first reference clock and a second reference clock, and to invert the second reference clock so as to generate a negative second reference clock. A dry non-plasma etching process can be implemented to transfer a pattern from a photo-lithographic layer to a hard mask layer, while minimizing the evolution of surface roughness in the sidewall of the etched pattern in the hard mask layer. The BMC then sends an operating parameter instruction to a plurality of hardware devices within the computer in response to receiving the IPMI command, wherein the operating parameter instruction sent to the plurality of hardware devices is associated with the system mode. Following transmission of the first subframe to the second node, the second frame is transmitted to the second node prior to transmission of the second subframe to the second node. The reduction member may also provide for course and fine movement of the shaft during the movement of the vertebral rod. The substrate is disposed in the appearance, and the substrate has a ground plane.