A structure including a substrate having a backside, a first through silicon via having sides, a bottom surface, and a first height protruding from the backside of the substrate, and a first conductor facing the backside of the substrate and in electrical contact with the first through silicon via. The hybrid substrate has a first surface portion that is optimal for n-type devices, and a second surface portion that is optimal for p-type devices. The body has a forward portion and a rearward portion.