A scaleable microprocessor architecture has an efficient and orthogonal instruction set of 20 basic instructions, and a scaleable program word size from 15 bits up, including but not limited to 16, 24, 32, and 64 bits. In embodiments of the present invention, according to an adjustment requirement for a line interface rate, a transport bandwidth of an OCh link is adjusted, the number of OTLs in an OTUCn link is adjusted, and the number of ODLs in an ODUCn link is adjusted, so that the line interface rate can be dynamically adjusted. A symbol at the end of each radio subframe is used to support the physical shared channel for communication links between a base station and a terminal device operating in a full-duplex mode, but the corresponding symbol is used to support a separate physical channel, for example an additional low-rate channel, for communication links operating in a half-duplex mode. The method for searching a routing table includes: directly searching an IP address to be searched according to a directly stored length of a next-level node pointer portion for storing the routing table; and reading a prefix node according to a searched result. The 10 coverage of the base transceiver station is defined as the intersection of the BCCH radio coverage and the TCH coverage.