Embodiments of the claimed subject matter are directed to methods and a system that use a standardized grid of clock buffers to automatically route clocks according to a uniform clock grid throughout an ASIC of a non-uniform arrangement of non-uniformly sized logic partitions. A thermal shield is located axially downstream of the rear end portion of the rotor for thermally shielding the same from the hot surrounding environment. According to the invention, sampling clocks with lower frequencies can be used for sampling, and the phase error can be corrected to obtain the correct data recovery. If the determination unit determines that the processing object is a common object capable of being used a plurality of times and rendering of which is time-consuming when deformation thereof is performed, then the generation unit generates a deformed new object. Probabilistic interconnect models are used to represent the collection of possible interconnect routings that provide acceptable circuit performance and routing area.