A method for operating a content addressable memory that includes receiving a first data value for evaluation at a first memory block during a first time interval, receiving a second data value for evaluation at a second memory block during a second time interval and evaluating said both the first and second data values during a third time interval. The circuit board has a fine and high-resolution wiring pattern and makes it possible to realize a miniature high-performance high-output module by mounting at least one high-output semiconductor element thereon. The abstract representation in essence provides a platform independent representation of test cases.