The present invention provides a circuit and a method for the full speed testing of semiconductor memory chips. An ink quantity lattice point smoothness evaluation function for evaluating the smoothness of the disposition of ink quantity lattice points whose components are the ink quantities of inks in various colors and a CMY lattice point smoothness evaluation function for evaluating the smoothness of the disposition of CMY lattice points defined by CMY color components are defined. The learning system logs the actions of users as they view the image. Upon assembly of two complementary wood panels as described above, a novel tongue and groove joint is formed wherein the shoulder will abut the first longitudinal edge, thus preventing the tongue from being completely introduced into the complementary groove.