A computer system with concurrent direct memory access is provided including a computer node having a processor interface bus and a cut-through network interface controller installed on the processor interface bus. At a target or base level, hardware are designed into and integrated with silicon parts. A first multiplier couples to receive a first coefficient and the image data input. In step S13, it is determined whether or not all normalization coefficients B have been encoded. This can cause less crowding of the logical block addresses within the logical space, thus making it easier for the file system to operate and improving system performance.