Disclosed is an inventive diode which can reduce a stray capacity to improve various characteristics thereof, in which a dielectric layer, a conductive layer and a second dielectric layer are respectively formed by deposition in this order on an upper face of a semiconductor substrate excluding a central portion of an exposed surface of a P-type region. The semiconductor memory device includes an extended mode register set containing a refresh information of each bank; and a bank refresh block for supporting a refresh operation performed in sequence to each bank in response to the refresh information of each bank. The signal can include a pattern of pulses. With the use of the spring and the E ring, the latch can be slid along the handle. The access node converts the request to a second format particular to the back-end system, and conveys the request to the back-end system.