1460826042-7474d0bd-0b2f-49ad-b5d6-678c058f04ee

An output stage interface circuit comprises a main bipolar transistor coupling a data output terminal to a first rail to which the positive of the power supply voltage is applied, and a substrate diffusion isolated main NMOS transistor coupling the data output terminal to a second rail which is held at ground. Data obtained from abandoned electronic or computer-generated forms is used to identify these lost visitors. The phase change memory layer having the superlattice structure includes a Sb2Te3 layer containing Zr in contact with the first electrode.