A network processor or other type of processor includes classification circuitry and memory circuitry coupled to the classification circuitry. The gating clock generating circuit compares logic levels of an input signal and an output signal of the noise filter circuit. The first and second switch elements are turned ON in a high-speed serial interface mode. The sliding member is configured to slidably fit into the channel and have its handle extend through the handle opening in the cover portion, such that when a user places the handle in a first position, the sliding member uncovers the drinking opening and when the user places the handle in a second position, the sliding member covers the drinking opening.