A low-pin-count chip package including a die pad for receiving a semiconductor chip and a plurality of connection pads electrically coupled to the semiconductor chip. As compared with conventional techniques, the disposition density of the spacer per pixel area is lowered, such that it is possible to prevent the pressure tolerance of the spacer from intensively acting only on a specific pixel. 1wherein, at least one of R1 to R4 is a group selected from the group consisting of groups represented by a general formula shown below and groups represented by a general formula shown below 2wherein, at least one of RA, RB and Z is a group represented by the formula CO.