In a stack array structure for a semiconductor memory device, a first semiconductor layer includes a plurality of first cell strings, and a second semiconductor including a plurality of second cell strings. The connector system includes a single-pin plug that has at least two conductors electrically isolated from one another to provide two separate electrically conductive surfaces to facilitate simultaneously transmitting two different electrical signals through the pin at the same time. The scaling factor is applied to each of the plurality of LLR terms to compute a corresponding plurality of scaled LLR terms. A lateral adjustment assembly provides a means to position the back end laterally with respect to the front end of the conveyor by rotating pivot plates about plate pivots. In some instances, the electrolyte material can comprise at least one organic polymer selected from polyethersulfones. A second pedal arm is mounted on a second pedal axle, wherein the second pedal axle is substantially vertical.