A semiconductor memory device includes memory cells, a source line, a word line, a bit line, and a driver circuit. The apparatus has a vacuum chamber into which wafers are loaded through a pair of loadlocks which are spaced one above the other. A narrow-width portion is provided at an end portion of each of the fine lines in a longitudinal direction of the fine line. Alternatively, one or more supplemental vacuum panels can be provided to confine or direct the temporary deformation thereto.