In a wireless telecommunications system, data processing delays associated with digital channelization and de-channelization may be reduced through the use of a technique that involves processing data blocks in conjunction with the transformation of the data blocks by a large, Fast Fourier Transform algorithm, and makes use of multiple transmission and reception branches. The pattern has an internal two-dimensional lattice symmetry on the planar substrate. A first resistive element is received by the substrate and connected between the transistor’s gate and the body.