An activity model is generated at a computer. A memory device 15 substantially stores b pieces of conversion logic equations produced with a conversion logic equation producing device 13. The performance monitor counter is incremented in response to predetermined events. By further forming a planarization layer on the color layer, the cell gap between the thin film transistor array substrate and the opposite substrate can be much more uniformly controlled. Thereby, there can be provided a silicon wafer for epitaxial growth wherein generation of SF is reduced and epitaxial wafer, and a method for producing it. This allows the burden on the examiner to be reduced remarkably, assuring a reliable local ERG examination.