1461113940-a871c058-904e-4adb-a0cc-e565f0771a64

A storage capacitor includes a first capacitor portion and a second capacitor portion, the second capacitor portion being disposed above the first capacitor portion, thereby defining a first direction. Such current multipliers can be implemented by complementary metal oxide semiconductor circuit elements. One or more parity generation circuits are configured to calculate a first parity bit from data written to the plurality of memory element pairs and a second parity bit from data read from one of the two memory storage elements in the plurality of memory element pairs. It is thereby possible to obtain a faster release of any unused Label Switched Path LSP than waiting for a timeout of 1 to 2 minutes, as it is currently the case.