An improved multi-wordline memory architecture providing decreased bitline coupling to increase speed and reduce power consumption including an interleaving arrangement for connecting adjacent bitcells to different wordlines, coupled to a multiplexing arrangement for sharing bitlines of adjacent bitcells. The gates include a top gate, a bottom gate, and side gates. The MR stack includes a pair of ferromagnetic layers magnetically coupled to the pair of single magnetic domain portions, and a spacer layer disposed between the pair of ferromagnetic layers. Such transactions as purchases of goods and services and applying for college admission are the types of transactions contemplated. The method includes storing a database including a plurality of records of worker profiles, providing a description of a job opening, storing the description of the job opening in a job opening database, and automatically determining by a processor, for at least one of the records in the worker database, whether the worker profile in the record matches the description of the job opening. Optional interface surfaces on the tap and base unit enable the tap and base unit to interlock to limit rotation of the tap relative to the base unit when the tap is fully inserted into the base unit.