A gate wire including a gate line and a gate electrode is formed on an insulating substrate of a TFT array panel. A probability of a failure of each of at least some of the first andor second data storage devices is determined, and at least one of the first andor data storage devices that is determined to have a higher probability of failure than a threshold andor a probability of failure of another of the data storage devices, is selected. The stitching is at least partially formed by colored thread to thereby form a line of colored stitching.