A relatively high-speed, high-efficiency CMOS two branch driver core that may operate under relatively low supply voltage may include thin oxide CMOS transistors configured to generate rail-to-rail output swings larger than twice a supply voltage and without exceeding safe operating area limits. Control apparatus coupled to the measuring apparatus generates a series of the threshold voltage levels and the delayed clock pulses during each period of a bit stream pulse. The on-chip test circuitry may also include a synchronizing circuit to minimize skew between the external clock and the data output from the test chip. Oxide is arranged between the outer conducting structure and the inner conducting structure. The multidisciplinary activities include activities scheduled to be performed by other clinicians, and each multidisciplinary activity is presented in the timeline view area based on a scheduled time.