A software simulation technique for pipelined hardware is provided in which the hardware is modelled as a plurality of pipelined circuit element models that each respectively read their input data values from a first data storage area A and write their output data values to a second data storage area B. Ideally, the polarity of the data in both the transmit and receive direction is inverted resulting in valid data for a link when a pair of modified modules are used and invalid data when a modified module is used with a standard fiber optic transceiver. A receiver receives the reference video image 1, the depth map 3 and the projection converting matrix 6. When a document made by stacking those recording sheets is seen from the top, and the specific images are visible through the confirmation holes, the originality of the document can be certified. The electrodes are connected to the first doping region and the second doping region through two of the holes. The claimed invention preferably uses a polyurethane reactive acrylic top coating that provides a high quality and cost effective surface finish to the decorated wood cellulose web material.