A lower electrode may be covered by a protective film to reduce the exposure of the lower electrode to subsequent processing steps or the open environment. An internal voltage having a dead zone is determined by first and second driving signals based on a level of a reference voltage, and by selectively supplying first and second voltages by means of the first and second driving signals. An adjustable-resistance circuit is connected to either or both of the respective gate and body of the FET. When the amount of state variation is not determined to be 0, a direction of a current flowing through the plurality of sub-modules is detected.