Hardware blocks respectively of an arbitrary access origin and an arbitrary access destination that are mutually accessible are extracted from among a plurality of hardware blocks constituting a bus system to be verified, and a path reaching from the access-origin hardware block to the access-destination hardware block is searched for. The access is accomplished by combining the separate TDI and TMS signals from the TAP controller into a single signal and communicating the TDI and TMS signals of the single signal on the rising and falling edges of the TCK driving the DDR interface. A first external controller has an ACDC transformer electrically coupled thereto. The invention schedules the broadcast program to be recorded by inserting the program’s information such as program identifier, start and end times, and storage duration into a recording schedule database.