A falling off of a through electrode is inhibited without decreasing a reliability of a semiconductor device including a through electrode. The ferrule has an open side through which optical transports may be inserted into a transport cavity in the ferrule from a direction transverse the longitudinal direction of the optical transports and ferrule. The flush valve housing is wider than it is higher, and fits into a blind hole in the tank wall of similar cross sectional shape. Wear leveling is then performed in the SSD based on the adjusted PE cycle count. Each CMOS circuit consists of an N-channel TFT having the lightly doped regions and a P-channel TFT having no lightly doped regions.