A plurality of System On a Chip integrated circuits, a media that intercouples the plurality of SOC integrated circuits to form at least one SOC LAN ring, and a routing address scheme. The external controller comprises a low speed microcontroller and a high speed microcontroller. Further, the wiring for signals to be transmitted from decoding drivers to a corresponding sub-word line driver is arranged in adjacent sub-arrays. An image signal with multiple regions of data is received.