1460429963-73de4442-bb51-4ccd-94de-27ab04454109

A system and method for performing dynamic load balancing during system operation between a pair of APs serving at least one cell in common. The graphic system includes a buffer, a status table, and a readwrite unit. Each application server may have a persistent storage device associated with it for storing data. The second error amplifier has a response speed faster than the first error amplifier with respect to changes of the output voltage, and is configured to decrease a gain thereof in response to a drain current of the output transistor. The buffer is held between an end piece of the reinforcing element and the main frame. A spacer with smaller thermal conductivity than the substrate and penetrated by a conductor piece with a small cross-sectional area is inserted between solder materials connecting to one of the thermistor electrodes.