Current appearing on a bit-line with no memory cells asserted may be used during a bit-line pre-charge time before a read is performed so as to bias a gate-drain shorted PMOS pull-up device connected between the bit-line and a power supply at a VDD potential. The refresh controller according to the present invention lowers the levels of peak currents by differentiating active times of a first bank enable signal and a second bank enable signal. A user authentication with the Wireless Local Area Network terminal is performed by the relay station in compliance with a Wireless Local Area Network protocol. In other words, two or more communication stations sequentially run in the interference avoidance operation mode in a time sharing manner. In a second embodiment, the method includes the step of removing the at least one forming element after curling the periphery and includes the step of replacing the at least one forming element with at least one spring element.