In order to correct the duty cycle of a given clock signal to produce a clock signal with a 50% duty cycle, a duty cycle correction circuit includes a delay unit for delaying a first clock signal to output a second clock signal and a clock-signal output unit. In one embodiment, the gateway performs translation between access network protocol signaling and gateway control protocol messaging such that, to the call agent, the gateway appears to be physically connected to a group of subscribers directly, and to the access network, the gateway appears to function as a circuit-switched network. A test sample is added in a fluid culture medium 7a and then a container 3a is sealed. The tuners convert the bands of television signals to a plurality of intermediate frequencies. The system further comprises a means for receiving a sub-set of the product identifiers, wherein the sub-set of product identifiers is for identifying a sub-set of the products which have a variation in performance.