An improved on-chip storage memory and method for storing variable data bits, the memory including an on-chip storage memory system for storing variable data bits that has a memory for storing data bits, a wrapper for converting the memory into a first-in first-out memory, and a controller for performing operations on the memory. In addition, the CPU executes a predetermined information process based on a relative position of a gravity center position, indicated by a latest gravity center position data, with respect to the variation range detected thus. Also provided is a subsidiary-drive-wheel acceleration-slip period engine output torque reduction circuitry that reduces an engine output torque responsively to suppressing the electric power output. Each pair of opposing sides is separated by a unique distance such that a ratio of unique distances for the two pairs of opposing parallel sides is \u215d.