In a digital PLL system, instead of measuring a binarized playback RF signal with a high frequency clock, pulse-length data is generated by using N phase clocks. A second housing is supported within the first housing and encloses a nozzle and a pressure regulator in axially-aligned relationship, defining a flowpath between the inlet and an orifice of the nozzle. Each verifying apparatus comprises a storage unit, a data switch and an edge detector. The first connector module, the second connector module and the organizer are configured to be mounted to the circuit board as a bundled unit. The levers are linked so that pushing one pedal away from the operator forces the other pedal towards the operator.