1459831246-f57ff2c2-39f7-4091-a8df-86571c8b33ad

Integrated circuits with delay circuitry are provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating speed of circuits. In the intermediate step an addendum part is expanded beyond the initial tooth profile by cold forging.