1459862186-0250cd33-c1cb-4064-9061-31c63bdc2c2f

An integrated circuit having a BIST control unit for testing a plurality of memory banks simultaneously is described. It is detected whether the presently sampled level increases from the previously sampled level. Undershoots and overshoots outside a user-defined threshold are detected. Back side portions of the carcass band are folded to radial outsides around the bead cores, respectively. Such phase comparators permit direct measurement of the amount of phase error prior to filtering and amplification by the phase locked loop. In order to minimally interfere with the flow behavior in the outflow of fuel, the infeed point of the bypass conduit into the outlet path is disposed in the vicinity of the valve chamber.