The invention involves a method of packaging and interconnecting four power transistor dies to operate at a first frequency without oscillation at a second frequency higher than the first frequency but lower than a cutoff frequency of the transistors. The data processing system includes one or more processor cores coupled to one or more memory controllers. n-butyl, sec-butyl, tert-butyl, n-pentyl, 3-methyl-butyl, 2-methyl-butyl, 1-methyl-butyl. 15% by weight, silicon in an amount of 1. Embodiments of the invention further provide a sharable index of the attributes of the entities and the group of entities. The environment terminal 36 comprises a connection to the model 35 via at least one circuit component representing the effect of the crossing line on the model.