A method of correcting for pattern run out in a desired pattern in directional deposition or etching comprising the steps ofproviding a test substrate;providing a stencil of known thickness on the test substrate;providing a stencil pattern extending through the stencil to the test substrate. The first mode corresponds to a first bias current value of the SPS receiver, the second mode corresponds to a second bias current value of the SPS receiver, and the first bias current value is different from the second bias current value. The layer to be etched is coated with a first planarized photoresist layer which is baked.