A lattice-structured multiple description vector quantization encoder generates M descriptions of a signal to be encoded, each of the descriptions being transmittable over a corresponding one of M channels. The CPU 8 has a first operation mode, in which the timing generator is set into a standby mode such that a leak current from the timing generator to the V driver is avoided when the power supply Voltage is not applied to the V driver, and a second operation mode, in which the timing generator is set into a normal operating condition after the power supply voltage has been applied to the V driver. A frequency divider selectively generates either a GSM clock signal or a UMTS clock signal by converting a frequency of the LO signal by a predetermined factor.